彈球游戲Verilog代碼Quartus仿真

名稱(chēng)：彈球游戲Verilog代碼Quartus仿真

軟件：Quartus

語(yǔ)言：Verilog

代碼功能：

設(shè)計(jì)要求：

1.查閱FPGA、VGA接口標(biāo)準(zhǔn)等相關(guān)資料文獻(xiàn)。

2.編寫(xiě)HDL代碼實(shí)現(xiàn)νGA顯示模塊和按鍵輸入模塊,并下載到開(kāi)發(fā)板進(jìn)行測(cè)試。

3.圖像分辨率不低于1024*768,目標(biāo)移動(dòng)方塊50*50,移動(dòng)彈板為20*100。

4.實(shí)現(xiàn)一個(gè)通過(guò)VGA顯示器進(jìn)行游戲顯示并通過(guò)按鍵進(jìn)行控制彈板的彈球游戲。

5.對(duì)項(xiàng)目的性?xún)r(jià)比以及社會(huì)經(jīng)濟(jì)效益進(jìn)行分析說(shuō)明。

實(shí)驗(yàn)要求：

1.完成系統(tǒng)硬件設(shè)計(jì)。

2.完成HDL代碼設(shè)計(jì)及仿真。

FPGA代碼Verilog/VHDL代碼資源下載：www.hdlcode.com

演示視頻：

設(shè)計(jì)文檔：

1. 工程文件

2. 程序文件

3. 程序編譯

4. RTL圖

5. Testbench

6. 仿真圖

整體仿真圖

按鍵模塊

VGA時(shí)序控制模塊

畫(huà)面生成模塊

部分代碼展示:

//VGA時(shí)序控制模塊
module?vga_controller_1024x768(rst_p,?pixel_clk,?HS,?VS,?hcount,?vcount,?video_enable);
???input???????????rst_p;//高電平復(fù)位
???input???????????pixel_clk;//65M
???output??????????HS;//行同步
???output??????????VS;//場(chǎng)同步
???output?[10:0]????hcount;//當(dāng)前x像素坐標(biāo)位置
???output?[10:0]????vcount;//當(dāng)前y像素坐標(biāo)位置
???output??????????video_enable;//顯示使能
???
???
???reg?????????????HS;???
???reg?????????????VS;???
???//定義1024*768的參數(shù)
???parameter??HMAX?=?1344;
???parameter??HLINES?=?1024;
???parameter??HFP?=?1024;
???parameter??HSP?=?1160;
???parameter??VMAX?=?806;
???parameter??VLINES?=?768;
???parameter??VFP?=?771;
???parameter??VSP?=?777;
???
???reg?[10:0]???????hcounter;
???reg?[10:0]???????vcounter;
???
???assign?hcount?=?hcounter;
???assign?vcount?=?vcounter;
???
???//行計(jì)數(shù)
???always?@(posedge?pixel_clk)
??????begin
?????????if?(rst_p?==?1'b1)
????????????hcounter?<=?11'b0;
?????????else?if?(hcounter?==?HMAX)
????????????hcounter?<=?11'b0;
?????????else
????????????hcounter?<=?hcounter?+?1;
??????end
???
???//場(chǎng)計(jì)數(shù)
???always?@(posedge?pixel_clk)
??????begin
?????????if?(rst_p?==?1'b1)
????????????vcounter?<=?11'b0;
?????????else?if?(hcounter?==?HMAX)
?????????begin
????????????if?(vcounter?==?VMAX)
???????????????vcounter?<=?11'b0;
????????????else
???????????????vcounter?<=?vcounter?+?1;
?????????end
??????end
???
???//行同步
???always?@(posedge?pixel_clk)
??????begin
?????????if?(hcounter?>=?HFP?&?hcounter?<?HSP)
????????????HS?<=?0;
?????????else
????????????HS?<=?1;
??????end
???
???//場(chǎng)同步
???always?@(posedge?pixel_clk)
??????begin
?????????if?(vcounter?>=?VFP?&?vcounter?<?VSP)
????????????VS?<=?0;
?????????else
????????????VS?<=?1;
??????end
???
???//輸出顯示使能信號(hào)
???assign?video_enable?=?((hcounter?<?HLINES?&?vcounter?<?VLINES))???1'b1?:??1'b0;
endmodule

點(diǎn)擊鏈接獲取代碼文件：http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=438